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ATmega128
Phase Correct PWM
Mode
The phase correct P W M mode ( W GM01:0 = 1) provides a high resolution phase correct P W M
waveform generation option. The phase correct P W M mode is based on a dual-slope operation.
The counter counts repeatedly from BOTTOM to MAX and then from MAX to BOTTOM. In non-
inverting Compare Output mode, the output compare (OC0) is cleared on the compare match
between TCNT0 and OCR0 while counting up, and set on the compare match while downcount-
ing. In inverting Output Compare mode, the operation is inverted. The dual-slope operation has
lower maximum operation frequency than single slope operation. However, due to the symmet-
ric feature of the dual-slope P W M modes, these modes are preferred for motor control
applications.
The P W M resolution for the phase correct P W M mode is fixed to 8 bits. In phase correct P W M
mode the counter is incremented until the counter value matches Max W hen the counter
reaches MAX, it changes the count direction. The TCNT0 value will be equal to MAX for one
timer clock cycle. The timing diagram for the phase correct P W M mode is shown on Figure 40 .
The TCNT0 value is in the timing diagram shown as a histogram for illustrating the dual-slope
operation. The diagram includes non-inverted and inverted P W M outputs. The small horizontal
line marks on the TCNT0 slopes represent compare matches between OCR0 and TCNT0.
Figure 40. Phase Correct P W M Mode, Timing Diagram
OCn Interrupt Flag Set
OCRn Update
TOVn Interrupt Flag Set
TCNTn
OCn
OCn
(COMn1:0 = 2)
(COMn1:0 = 3)
Period
1
2
3
The Timer/Counter Overflow Flag ( TOV0 ) is set each time the counter reaches BOTTOM. The
interrupt flag can be used to generate an interrupt each time the counter reaches the BOTTOM
value.
In phase correct P W M mode, the compare unit allows generation of P W M waveforms on the
OC0 pin. Setting the COM01:0 bits to 2 will produce a non-inverted P W M. An inverted P W M out-
put can be generated by setting the COM01:0 to 3 (See Table 55 on page 105 ). The actual OC0
value will only be visible on the port pin if the data direction for the port pin is set as output. The
P W M waveform is generated by clearing (or setting) the OC0 Register at the compare match
between OCR0 and TCNT0 when the counter increments, and setting (or clearing) the OC0
Register at compare match between OCR0 and TCNT0 when the counter decrements. The
100
2467X–AVR–06/11
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